Openings >> Senior PLM CAD Engineer
Senior PLM CAD Engineer
Title:Senior PLM CAD Engineer
Location:San Jose, CA
Employment type:Full Time Hire

This Senior PLM CAD Engineer position reports to the Sr Director of Systems Engineering and requires specialized depth and/or breadth of expertise in Engineering and CAD/PLM integrations.  The Senior PLM CAD Engineer supports engineering by collaborating with teams working with PLM/PDM systems, MCAD/ECAD tools, and change workflows.  Semiconductor reactor design experience is a plus. 

Major Responsibilities:

  • Collaborate with external subject matter experts and solution architects to develop initiatives and solutions that support the needs of Engineering.
  • Define deployment methodologies, integration, testing and validation for both internal and vendor/support teams
  • Functional support for the enhancement, development, implementation, migration, and upgrade of CAD/PLM systems
  • Additional scope to include, Mechanical engineering design of semiconductor reactor and support systems according to functional and engineering specifications that meet performance, quality, reliability, cost and schedule targets.
  • Own and/or direct support personnel in the generation of detailed engineering documentation required to effectively manufacture components and subsystems for prototypes and volume manufacturing.
  • Ideation, evaluation, and recommendation of innovative solutions in a methodical and structured manner.

Mandatory Qualifications:

  • BSME or MSME with years of experience.
  • Proficiency with major CAD / PDM engineering tools.
  • Ability to act as a mentor to peers, including actively participating in design reviews, reviewing and providing feedback on others work including presentations, drawings and models.
  • Ability to lead functional teams/projects and to work independently, with guidance in only the most complex situations.

Highly Desired Qualifications:

  • Advanced Degree in Mechanical Engineering.
  • Proficiency with NX and Teamcenter.
  • Proficiency with tolerance stack up analysis methods (e.g. RSS, Monte-Carlo, etc.).
  • Proficiency in the development and design of plasma and/or thermal CVD/ALD semiconductor reactor components (e.g. high temp wafer heaters, gas distribution showerheads, electrostatic chucks, wafer lift mechanisms, bellows, etc.) and/or subsystems/support systems (e.g. liquid precursor delivery, vacuum systems, temperature control systems, etc.).
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